Pomeranz, Irith: search on Z-Library

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1

[IEEE 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Florence, Italy (2019.3.25-2019.3.29)] 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Resynthesis for Avoiding Undetectable Faults Based on Design-for-Manufacturability Guidelines

Wang, Naixing, Pomeranz, Irith, Reddy, Sudhakar M., Sinha, Arani, Venkataraman, Srikanth

Year:

2019

Language:

english

File:

PDF, 176 KB

english, 2019

2

[ACM Press the 41st annual conference - San Diego, CA, USA (2004.06.07-2004.06.11)] Proceedings of the 41st annual conference on Design automation - DAC '04 - On test generation for transition faults with minimized peak power dissipation

Li, Wei, Reddy, Sudhakar M., Pomeranz, Irith

Year:

2004

Language:

english

File:

PDF, 178 KB

english, 2004

3

LFSR-Based Generation of Multicycle Tests

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2016

Language:

english

File:

PDF, 127 KB

english, 2016

4

[IEEE 2018 IEEE European Test Symposium (ETS) - Bremen (2018.5.28-2018.6.1)] 2018 IEEE 23rd European Test Symposium (ETS) - Covering undetected transition fault sites with optimistic unspecified transition faults under multicycle tests

Pomeranz, Irith

Year:

2018

Language:

english

File:

PDF, 82 KB

english, 2018

5

Invisible-Scan: A Design-for-Testability Approach for Functional Test Sequences

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2018

Language:

english

File:

PDF, 171 KB

english, 2018

6

[IEEE 2011 16th IEEE European Test Symposium (ETS) - Trondheim, Norway (2011.05.23-2011.05.27)] 2011 Sixteenth IEEE European Test Symposium - On Transition Fault Diagnosis Using Multicycle At-Speed Broadside Tests

Pomeranz, Irith

Year:

2011

Language:

english

File:

PDF, 147 KB

english, 2011

7

Reduced Power Transition Fault Test Sets for Circuits With Independent Scan Chain Modes

Pomeranz, Irith

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 256 KB

english, 2013

8

Low-Power Test Generation by Merging of Functional Broadside Test Cubes

Pomeranz, Irith

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2014

Language:

english

File:

PDF, 3.66 MB

english, 2014

9

[IEEE 2011 IEEE VLSI Test Symposium (VTS) - Dana Point, CA, USA (2011.05.1-2011.05.5)] 29th VLSI Test Symposium - Static test compaction for delay fault test sets consisting of broadside and skewed-load tests

Pomeranz, Irith

Year:

2011

Language:

english

File:

PDF, 164 KB

english, 2011

10

Functional Broadside Tests for Multistep Defect Diagnosis

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 889 KB

english, 2014

11

[IEEE 2010 15th Asia and South Pacific Design Automation Conference ASP-DAC 2010 - Taipei, Taiwan (2010.01.18-2010.01.21)] 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC) - Functional and partially-functional skewed-load tests

Pomeranz, Irith, Reddy, Sudhakar M.

Year:

2010

Language:

english

File:

PDF, 139 KB

english, 2010

12

On test data volume reduction for multiple scan chain designs

Reddy, Sudhakar M., Miyase, Kohei, Kajihara, Seiji, Pomeranz, Irith

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2003

Language:

english

File:

PDF, 101 KB

english, 2003

13

Reducing the switching activity of test sequences under transparent-scan

Pomeranz, Irith, Reddy, Sudhakar M.

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2011

Language:

english

File:

PDF, 176 KB

english, 2011

14

A Multicycle Test Set Based on a Two-Cycle Test Set With Constant Primary Input Vectors

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2015

Language:

english

File:

PDF, 156 KB

english, 2015

15

Functional test generation for delay faults in combinational circuits

Pomeranz, Irith, Reddy, Sudhakar M.

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

1998

Language:

english

File:

PDF, 127 KB

english, 1998

16

[ACM Press the 20th symposium - Providence, Rhode Island, USA (2010.05.16-2010.05.18)] Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10 - Deterministic broadside test generation for transition path delay faults

Yao, Bo, Pomeranz, Irith, Reddy, Sudhakar M.

Year:

2010

Language:

english

File:

PDF, 425 KB

english, 2010

17

Multicycle Broadside and Skewed-Load Tests for Test Compaction

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2018

Language:

english

File:

PDF, 129 KB

english, 2018

18

[IEEE 2010 19th Asian Test Symposium (ATS) - Shanghai, China (2010.12.1-2010.12.4)] 2010 19th IEEE Asian Test Symposium - On Bias in Transition Coverage of Test Sets for Path Delay Faults

Pomeranz, Irith, Reddy, Sudhakar M.

Year:

2010

Language:

english

File:

PDF, 133 KB

english, 2010

19

Computing Two-Pattern Test Cubes for Transition Path Delay Faults

Pomeranz, Irith

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 2.21 MB

english, 2013

20

[IEEE 2011 IEEE 17th Pacific Rim International Symposium on Dependable Computing (PRDC) - Pasadena, CA, USA (2011.12.12-2011.12.14)] 2011 IEEE 17th Pacific Rim International Symposium on Dependable Computing - Augmenting Functional Broadside Tests for Transition Fault Coverage with Bounded Switching Activity

Pomeranz, Irith

Year:

2011

Language:

english

File:

PDF, 152 KB

english, 2011

21

[IEEE 2008 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTVS) - Cambridge, MA, USA (2008.10.1-2008.10.3)] 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems - Detection of Transistor Stuck-Open Faults in Asynchronous Inputs of Scan Cells

Yang, Fan, Chakravarty, Sreejit, Devta-Prasanna, Narendra, Reddy, Sudhakar M., Pomeranz, Irith

Year:

2008

Language:

english

File:

PDF, 367 KB

english, 2008

22

Transient-fault recovery using simultaneous multithreading

Vijaykumar, T. N., Pomeranz, Irith, Cheng, Karl

Journal:

ACM SIGARCH Computer Architecture News

Year:

2002

Language:

english

File:

PDF, 1.48 MB

english, 2002

23

[IEEE 2009 Asia and South Pacific Design Automation Conference (ASP-DAC) - Yokohama, Japan (2009.01.19-2009.01.22)] 2009 Asia and South Pacific Design Automation Conference - Dynamic test compaction for a random test generation procedure with input cube avoidance

Pomeranz, Irith, Reddy, Sudhakar M.

Year:

2009

Language:

english

File:

PDF, 80 KB

english, 2009

24

[ACM Press the 39th conference - New Orleans, Louisiana, USA (2002.06.10-2002.06.14)] Proceedings of the 39th conference on Design automation - DAC '02 - On output response compression in the presence of unknown output values

Pomeranz, Irith, Kundu, Sandip, Reddy, Sudhakar M.

Year:

2002

Language:

english

File:

PDF, 131 KB

english, 2002

25

LFSR-Based Generation of Partially-Functional Broadside Tests

Pomeranz, Irith

Journal:

IEEE Transactions on Computers

Year:

2015

Language:

english

File:

PDF, 161 KB

english, 2015

26

FaultHound

Nitin,, Pomeranz, Irith, Vijaykumar, T. N.

Journal:

ACM SIGARCH Computer Architecture News

Year:

2015

Language:

english

File:

PDF, 371 KB

english, 2015

27

Low-power test sets under test-related primary input constraints

Pomeranz, Irith

Journal:

International Journal of Critical Computer-Based Systems

Year:

2013

Language:

english

File:

PDF, 233 KB

english, 2013

28

PRESERVE: Static Test Compaction that Preserves Individual Numbers of Tests

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2020

File:

PDF, 125 KB

2020

29

An optimal algorithm for cycle breaking in directed graphs

Tatiana Orenstein, Zvi Kohavi, Irith Pomeranz

Journal:

Journal of Electronic Testing

Year:

1995

Language:

english

File:

PDF, 831 KB

english, 1995

30

Transition Path Delay Faults: A New Path Delay Fault Model for Small and Large Delay Defects

Pomeranz, Irith, Reddy, Sudhakar M.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2008

Language:

english

File:

PDF, 637 KB

english, 2008

31

[IEEE 2014 IEEE 32nd VLSI Test Symposium (VTS) - Napa, CA, USA (2014.04.13-2014.04.17)] 2014 IEEE 32nd VLSI Test Symposium (VTS) - Fault simulation with test switching for static test compaction

Pomeranz, Irith

Year:

2014

Language:

english

File:

PDF, 190 KB

english, 2014

32

Invariant States and Redundant Logic in Synchronous Sequential Circuits

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2007

Language:

english

File:

PDF, 127 KB

english, 2007

33

[IEEE 16th Asian Test Symposium (ATS 2007) - Beijing, China (2007.10.8-2007.10.11)] 16th Asian Test Symposium (ATS 2007) - Enhanced Broadside Testing for Improved Transition Fault Coverage

Pomeranz, Irith, Reddy, Sudhakar M.

Year:

2007

Language:

english

File:

PDF, 187 KB

english, 2007

34

Reducing the input test data volume under transparent scan

Pomeranz, Irith

Journal:

IET Computers & Digital Techniques

Year:

2014

Language:

english

File:

PDF, 171 KB

english, 2014

35

Test Scores for Improving the Accuracy of Logic Diagnosis for Multiple Defects

Pomeranz, Irith

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2019

File:

PDF, 7 KB

2019

36

[IEEE 2020 IEEE 38th VLSI Test Symposium (VTS) - San Diego, CA, USA (2020.4.5-2020.4.8)] 2020 IEEE 38th VLSI Test Symposium (VTS) - Input Test Data Volume Reduction Using Seed Complementation and Multiple LFSRs

Pomeranz, Irith

Year:

2020

File:

PDF, 141 KB

2020

37

[IEEE 2006 15th Asian Test Symposium - Fukuoka, Japan (2006.11.20-2006.11.20)] 2006 15th Asian Test Symposium - To Overtest Or Not To Overtest - More Questions Than Answers

Pomeranz, Irith

Year:

2006

Language:

english

File:

PDF, 71 KB

english, 2006

38

[IEEE 2006 15th Asian Test Symposium - Fukuoka, Japan (2006.11.20-2006.11.20)] 2006 15th Asian Test Symposium - A Functional Fault Model with Implicit Fault Effect Propagation Requirements

Pomeranz, Irith, Patil, Srinivas, Parvathala, Praveen

Year:

2006

Language:

english

File:

PDF, 106 KB

english, 2006

39

Static Test Compaction for Low-Power Test Sets by Increasing the Switching Activity

Pomeranz, Irith

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2014

Language:

english

File:

PDF, 695 KB

english, 2014

40

Multi-cycle broadside tests with runs of constant primary input vectors

Pomeranz, Irith

Journal:

IET Computers & Digital Techniques

Year:

2013

Language:

english

File:

PDF, 167 KB

english, 2013

41

[ACM Press the 45th annual conference - Anaheim, California (2008.06.08-2008.06.13)] Proceedings of the 45th annual conference on Design automation - DAC '08 - On tests to detect via opens in digital CMOS circuits

Reddy, Sudhakar M., Pomeranz, Irith, Liu, Chen

Year:

2008

Language:

english

File:

PDF, 782 KB

english, 2008

42

Design-for-testability for multi-cycle broadside tests by holding of state variables

Pomeranz, Irith

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2014

Language:

english

File:

PDF, 222 KB

english, 2014

43

[ACM Press the 36th ACM/IEEE conference - New Orleans, Louisiana, United States (1999.06.21-1999.06.25)] Proceedings of the 36th ACM/IEEE conference on Design automation conference - DAC '99 - Built-in test sequence generation for synchronous sequential circuits based on loading and expansion of test subsequences

Pomeranz, Irith, Reddy, Sudhakar M.

Year:

1999

Language:

english

File:

PDF, 47 KB

english, 1999

44

[ACM Press the 38th conference - Las Vegas, Nevada, United States (2001..-..)] Proceedings of the 38th conference on Design automation - DAC '01 - An approach to test compaction for scan circuits that enhances at-speed testing

Pomeranz, Irith, Reddy, Sudhakar

Year:

2001

Language:

english

File:

PDF, 85 KB

english, 2001

45

[ACM Press the 52nd Annual Design Automation Conference - San Francisco, California (2015.06.07-2015.06.11)] Proceedings of the 52nd Annual Design Automation Conference on - DAC '15 - Generation of close-to-functional broadside tests with equal primary input vectors

Pomeranz, Irith

Year:

2015

Language:

english

File:

PDF, 56 KB

english, 2015

46

Functional Broadside Tests under Broadcast Scan

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2019

Language:

english

File:

PDF, 116 KB

english, 2019

47

Padding of LFSR Seeds for Reduced Input Test Data Volume

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2020

File:

PDF, 136 KB

2020

48

[IEEE 2020 IEEE 26th International Symposium on On-Line Testing and Robust System Design (IOLTS) - Napoli, Italy (2020.7.13-2020.7.15)] 2020 IEEE 26th International Symposium on On-Line Testing and Robust System Design (IOLTS) - Storage Based Built-In Test Pattern Generation Method for Close-to-Functional Broadside Tests

Pomeranz, Irith

Year:

2020

File:

PDF, 132 KB

2020

49

Functional Broadside Tests With Incompletely Specified Scan-In States

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2013

Language:

english

File:

PDF, 96 KB

english, 2013

50

[IEEE 2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Arlington, VA, USA (2006.10.4-2006.10.4)] 2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Scan-Based Delay Fault Tests for Diagnosis of Transition Faults

Pomeranz, Irith, Reddy, Sudhakar

Year:

2006

Language:

english

File:

PDF, 131 KB

english, 2006

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